
led3:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004006a8 <_init>:
  4006a8:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4006ac:	910003fd 	mov	x29, sp
  4006b0:	94000052 	bl	4007f8 <call_weak_fn>
  4006b4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4006b8:	d65f03c0 	ret

Disassembly of section .plt:

00000000004006c0 <.plt>:
  4006c0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4006c4:	b0000090 	adrp	x16, 411000 <__FRAME_END__+0xfbdc>
  4006c8:	f947fe11 	ldr	x17, [x16, #4088]
  4006cc:	913fe210 	add	x16, x16, #0xff8
  4006d0:	d61f0220 	br	x17
  4006d4:	d503201f 	nop
  4006d8:	d503201f 	nop
  4006dc:	d503201f 	nop

00000000004006e0 <fputs@plt>:
  4006e0:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  4006e4:	f9400211 	ldr	x17, [x16]
  4006e8:	91000210 	add	x16, x16, #0x0
  4006ec:	d61f0220 	br	x17

00000000004006f0 <exit@plt>:
  4006f0:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  4006f4:	f9400611 	ldr	x17, [x16, #8]
  4006f8:	91002210 	add	x16, x16, #0x8
  4006fc:	d61f0220 	br	x17

0000000000400700 <sprintf@plt>:
  400700:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400704:	f9400a11 	ldr	x17, [x16, #16]
  400708:	91004210 	add	x16, x16, #0x10
  40070c:	d61f0220 	br	x17

0000000000400710 <fputc@plt>:
  400710:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400714:	f9400e11 	ldr	x17, [x16, #24]
  400718:	91006210 	add	x16, x16, #0x18
  40071c:	d61f0220 	br	x17

0000000000400720 <fclose@plt>:
  400720:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400724:	f9401211 	ldr	x17, [x16, #32]
  400728:	91008210 	add	x16, x16, #0x20
  40072c:	d61f0220 	br	x17

0000000000400730 <fopen@plt>:
  400730:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400734:	f9401611 	ldr	x17, [x16, #40]
  400738:	9100a210 	add	x16, x16, #0x28
  40073c:	d61f0220 	br	x17

0000000000400740 <__libc_start_main@plt>:
  400740:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400744:	f9401a11 	ldr	x17, [x16, #48]
  400748:	9100c210 	add	x16, x16, #0x30
  40074c:	d61f0220 	br	x17

0000000000400750 <memset@plt>:
  400750:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400754:	f9401e11 	ldr	x17, [x16, #56]
  400758:	9100e210 	add	x16, x16, #0x38
  40075c:	d61f0220 	br	x17

0000000000400760 <__gmon_start__@plt>:
  400760:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400764:	f9402211 	ldr	x17, [x16, #64]
  400768:	91010210 	add	x16, x16, #0x40
  40076c:	d61f0220 	br	x17

0000000000400770 <abort@plt>:
  400770:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400774:	f9402611 	ldr	x17, [x16, #72]
  400778:	91012210 	add	x16, x16, #0x48
  40077c:	d61f0220 	br	x17

0000000000400780 <puts@plt>:
  400780:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400784:	f9402a11 	ldr	x17, [x16, #80]
  400788:	91014210 	add	x16, x16, #0x50
  40078c:	d61f0220 	br	x17

0000000000400790 <fwrite@plt>:
  400790:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400794:	f9402e11 	ldr	x17, [x16, #88]
  400798:	91016210 	add	x16, x16, #0x58
  40079c:	d61f0220 	br	x17

00000000004007a0 <__assert_fail@plt>:
  4007a0:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  4007a4:	f9403211 	ldr	x17, [x16, #96]
  4007a8:	91018210 	add	x16, x16, #0x60
  4007ac:	d61f0220 	br	x17

Disassembly of section .text:

00000000004007b0 <_start>:
  4007b0:	d280001d 	mov	x29, #0x0                   	// #0
  4007b4:	d280001e 	mov	x30, #0x0                   	// #0
  4007b8:	aa0003e5 	mov	x5, x0
  4007bc:	f94003e1 	ldr	x1, [sp]
  4007c0:	910023e2 	add	x2, sp, #0x8
  4007c4:	910003e6 	mov	x6, sp
  4007c8:	580000c0 	ldr	x0, 4007e0 <_start+0x30>
  4007cc:	580000e3 	ldr	x3, 4007e8 <_start+0x38>
  4007d0:	58000104 	ldr	x4, 4007f0 <_start+0x40>
  4007d4:	97ffffdb 	bl	400740 <__libc_start_main@plt>
  4007d8:	97ffffe6 	bl	400770 <abort@plt>
  4007dc:	00000000 	.inst	0x00000000 ; undefined
  4007e0:	00400f7c 	.word	0x00400f7c
  4007e4:	00000000 	.word	0x00000000
  4007e8:	00400fd0 	.word	0x00400fd0
  4007ec:	00000000 	.word	0x00000000
  4007f0:	00401050 	.word	0x00401050
  4007f4:	00000000 	.word	0x00000000

00000000004007f8 <call_weak_fn>:
  4007f8:	b0000080 	adrp	x0, 411000 <__FRAME_END__+0xfbdc>
  4007fc:	f947f000 	ldr	x0, [x0, #4064]
  400800:	b4000040 	cbz	x0, 400808 <call_weak_fn+0x10>
  400804:	17ffffd7 	b	400760 <__gmon_start__@plt>
  400808:	d65f03c0 	ret
  40080c:	00000000 	.inst	0x00000000 ; undefined

0000000000400810 <deregister_tm_clones>:
  400810:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  400814:	9101e000 	add	x0, x0, #0x78
  400818:	d0000081 	adrp	x1, 412000 <fputs@GLIBC_2.17>
  40081c:	9101e021 	add	x1, x1, #0x78
  400820:	eb00003f 	cmp	x1, x0
  400824:	540000a0 	b.eq	400838 <deregister_tm_clones+0x28>  // b.none
  400828:	b0000001 	adrp	x1, 401000 <__libc_csu_init+0x30>
  40082c:	f9403821 	ldr	x1, [x1, #112]
  400830:	b4000041 	cbz	x1, 400838 <deregister_tm_clones+0x28>
  400834:	d61f0020 	br	x1
  400838:	d65f03c0 	ret
  40083c:	d503201f 	nop

0000000000400840 <register_tm_clones>:
  400840:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  400844:	9101e000 	add	x0, x0, #0x78
  400848:	d0000081 	adrp	x1, 412000 <fputs@GLIBC_2.17>
  40084c:	9101e021 	add	x1, x1, #0x78
  400850:	cb000021 	sub	x1, x1, x0
  400854:	9343fc21 	asr	x1, x1, #3
  400858:	8b41fc21 	add	x1, x1, x1, lsr #63
  40085c:	9341fc21 	asr	x1, x1, #1
  400860:	b40000a1 	cbz	x1, 400874 <register_tm_clones+0x34>
  400864:	b0000002 	adrp	x2, 401000 <__libc_csu_init+0x30>
  400868:	f9403c42 	ldr	x2, [x2, #120]
  40086c:	b4000042 	cbz	x2, 400874 <register_tm_clones+0x34>
  400870:	d61f0040 	br	x2
  400874:	d65f03c0 	ret

0000000000400878 <__do_global_dtors_aux>:
  400878:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40087c:	910003fd 	mov	x29, sp
  400880:	f9000bf3 	str	x19, [sp, #16]
  400884:	d0000093 	adrp	x19, 412000 <fputs@GLIBC_2.17>
  400888:	3941e260 	ldrb	w0, [x19, #120]
  40088c:	35000080 	cbnz	w0, 40089c <__do_global_dtors_aux+0x24>
  400890:	97ffffe0 	bl	400810 <deregister_tm_clones>
  400894:	52800020 	mov	w0, #0x1                   	// #1
  400898:	3901e260 	strb	w0, [x19, #120]
  40089c:	f9400bf3 	ldr	x19, [sp, #16]
  4008a0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4008a4:	d65f03c0 	ret

00000000004008a8 <frame_dummy>:
  4008a8:	17ffffe6 	b	400840 <register_tm_clones>

00000000004008ac <xy_configure_trigger>:
  4008ac:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4008b0:	910003fd 	mov	x29, sp
  4008b4:	b9001fa0 	str	w0, [x29, #28]
  4008b8:	b9001ba1 	str	w1, [x29, #24]
  4008bc:	b9401ba0 	ldr	w0, [x29, #24]
  4008c0:	7100001f 	cmp	w0, #0x0
  4008c4:	540002c0 	b.eq	40091c <xy_configure_trigger+0x70>  // b.none
  4008c8:	b9401ba0 	ldr	w0, [x29, #24]
  4008cc:	7100041f 	cmp	w0, #0x1
  4008d0:	54000260 	b.eq	40091c <xy_configure_trigger+0x70>  // b.none
  4008d4:	b9401ba0 	ldr	w0, [x29, #24]
  4008d8:	7100081f 	cmp	w0, #0x2
  4008dc:	54000200 	b.eq	40091c <xy_configure_trigger+0x70>  // b.none
  4008e0:	b9401ba0 	ldr	w0, [x29, #24]
  4008e4:	71000c1f 	cmp	w0, #0x3
  4008e8:	540001a0 	b.eq	40091c <xy_configure_trigger+0x70>  // b.none
  4008ec:	b9401ba0 	ldr	w0, [x29, #24]
  4008f0:	7100101f 	cmp	w0, #0x4
  4008f4:	54000140 	b.eq	40091c <xy_configure_trigger+0x70>  // b.none
  4008f8:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  4008fc:	910f8002 	add	x2, x0, #0x3e0
  400900:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400904:	91020001 	add	x1, x0, #0x80
  400908:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  40090c:	91022000 	add	x0, x0, #0x88
  400910:	aa0203e3 	mov	x3, x2
  400914:	52800502 	mov	w2, #0x28                  	// #40
  400918:	97ffffa2 	bl	4007a0 <__assert_fail@plt>
  40091c:	b9401fa0 	ldr	w0, [x29, #28]
  400920:	7100041f 	cmp	w0, #0x1
  400924:	54000200 	b.eq	400964 <xy_configure_trigger+0xb8>  // b.none
  400928:	b9401fa0 	ldr	w0, [x29, #28]
  40092c:	7100081f 	cmp	w0, #0x2
  400930:	540001a0 	b.eq	400964 <xy_configure_trigger+0xb8>  // b.none
  400934:	b9401fa0 	ldr	w0, [x29, #28]
  400938:	71000c1f 	cmp	w0, #0x3
  40093c:	54000140 	b.eq	400964 <xy_configure_trigger+0xb8>  // b.none
  400940:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400944:	910f8002 	add	x2, x0, #0x3e0
  400948:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  40094c:	91020001 	add	x1, x0, #0x80
  400950:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400954:	9103c000 	add	x0, x0, #0xf0
  400958:	aa0203e3 	mov	x3, x2
  40095c:	52800562 	mov	w2, #0x2b                  	// #43
  400960:	97ffff90 	bl	4007a0 <__assert_fail@plt>
  400964:	b9401fa0 	ldr	w0, [x29, #28]
  400968:	7100081f 	cmp	w0, #0x2
  40096c:	54000180 	b.eq	40099c <xy_configure_trigger+0xf0>  // b.none
  400970:	71000c1f 	cmp	w0, #0x3
  400974:	54000220 	b.eq	4009b8 <xy_configure_trigger+0x10c>  // b.none
  400978:	7100041f 	cmp	w0, #0x1
  40097c:	540002c1 	b.ne	4009d4 <xy_configure_trigger+0x128>  // b.any
  400980:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400984:	91048001 	add	x1, x0, #0x120
  400988:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  40098c:	9104a000 	add	x0, x0, #0x128
  400990:	97ffff68 	bl	400730 <fopen@plt>
  400994:	f90017a0 	str	x0, [x29, #40]
  400998:	14000013 	b	4009e4 <xy_configure_trigger+0x138>
  40099c:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  4009a0:	91048001 	add	x1, x0, #0x120
  4009a4:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  4009a8:	91052000 	add	x0, x0, #0x148
  4009ac:	97ffff61 	bl	400730 <fopen@plt>
  4009b0:	f90017a0 	str	x0, [x29, #40]
  4009b4:	1400000c 	b	4009e4 <xy_configure_trigger+0x138>
  4009b8:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  4009bc:	91048001 	add	x1, x0, #0x120
  4009c0:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  4009c4:	9105a000 	add	x0, x0, #0x168
  4009c8:	97ffff5a 	bl	400730 <fopen@plt>
  4009cc:	f90017a0 	str	x0, [x29, #40]
  4009d0:	14000005 	b	4009e4 <xy_configure_trigger+0x138>
  4009d4:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  4009d8:	91062000 	add	x0, x0, #0x188
  4009dc:	97ffff69 	bl	400780 <puts@plt>
  4009e0:	d503201f 	nop
  4009e4:	f94017a0 	ldr	x0, [x29, #40]
  4009e8:	f100001f 	cmp	x0, #0x0
  4009ec:	54000081 	b.ne	4009fc <xy_configure_trigger+0x150>  // b.any
  4009f0:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  4009f4:	91068000 	add	x0, x0, #0x1a0
  4009f8:	97ffff62 	bl	400780 <puts@plt>
  4009fc:	b9401ba0 	ldr	w0, [x29, #24]
  400a00:	7100081f 	cmp	w0, #0x2
  400a04:	54000360 	b.eq	400a70 <xy_configure_trigger+0x1c4>  // b.none
  400a08:	7100081f 	cmp	w0, #0x2
  400a0c:	540000c8 	b.hi	400a24 <xy_configure_trigger+0x178>  // b.pmore
  400a10:	7100001f 	cmp	w0, #0x0
  400a14:	54000120 	b.eq	400a38 <xy_configure_trigger+0x18c>  // b.none
  400a18:	7100041f 	cmp	w0, #0x1
  400a1c:	540001c0 	b.eq	400a54 <xy_configure_trigger+0x1a8>  // b.none
  400a20:	14000029 	b	400ac4 <xy_configure_trigger+0x218>
  400a24:	71000c1f 	cmp	w0, #0x3
  400a28:	54000320 	b.eq	400a8c <xy_configure_trigger+0x1e0>  // b.none
  400a2c:	7100101f 	cmp	w0, #0x4
  400a30:	540003c0 	b.eq	400aa8 <xy_configure_trigger+0x1fc>  // b.none
  400a34:	14000024 	b	400ac4 <xy_configure_trigger+0x218>
  400a38:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400a3c:	91072000 	add	x0, x0, #0x1c8
  400a40:	f94017a3 	ldr	x3, [x29, #40]
  400a44:	d28000a2 	mov	x2, #0x5                   	// #5
  400a48:	d2800021 	mov	x1, #0x1                   	// #1
  400a4c:	97ffff51 	bl	400790 <fwrite@plt>
  400a50:	14000021 	b	400ad4 <xy_configure_trigger+0x228>
  400a54:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400a58:	91074000 	add	x0, x0, #0x1d0
  400a5c:	f94017a3 	ldr	x3, [x29, #40]
  400a60:	d2800122 	mov	x2, #0x9                   	// #9
  400a64:	d2800021 	mov	x1, #0x1                   	// #1
  400a68:	97ffff4a 	bl	400790 <fwrite@plt>
  400a6c:	1400001a 	b	400ad4 <xy_configure_trigger+0x228>
  400a70:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400a74:	91078000 	add	x0, x0, #0x1e0
  400a78:	f94017a3 	ldr	x3, [x29, #40]
  400a7c:	d2800082 	mov	x2, #0x4                   	// #4
  400a80:	d2800021 	mov	x1, #0x1                   	// #1
  400a84:	97ffff43 	bl	400790 <fwrite@plt>
  400a88:	14000013 	b	400ad4 <xy_configure_trigger+0x228>
  400a8c:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400a90:	9107a000 	add	x0, x0, #0x1e8
  400a94:	f94017a3 	ldr	x3, [x29, #40]
  400a98:	d2800082 	mov	x2, #0x4                   	// #4
  400a9c:	d2800021 	mov	x1, #0x1                   	// #1
  400aa0:	97ffff3c 	bl	400790 <fwrite@plt>
  400aa4:	1400000c 	b	400ad4 <xy_configure_trigger+0x228>
  400aa8:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400aac:	9107c000 	add	x0, x0, #0x1f0
  400ab0:	f94017a3 	ldr	x3, [x29, #40]
  400ab4:	d2800082 	mov	x2, #0x4                   	// #4
  400ab8:	d2800021 	mov	x1, #0x1                   	// #1
  400abc:	97ffff35 	bl	400790 <fwrite@plt>
  400ac0:	14000005 	b	400ad4 <xy_configure_trigger+0x228>
  400ac4:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400ac8:	9107e000 	add	x0, x0, #0x1f8
  400acc:	97ffff2d 	bl	400780 <puts@plt>
  400ad0:	d503201f 	nop
  400ad4:	f94017a0 	ldr	x0, [x29, #40]
  400ad8:	97ffff12 	bl	400720 <fclose@plt>
  400adc:	52800000 	mov	w0, #0x0                   	// #0
  400ae0:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400ae4:	d65f03c0 	ret

0000000000400ae8 <xy_trigger_timer_delay>:
  400ae8:	a9bb7bfd 	stp	x29, x30, [sp, #-80]!
  400aec:	910003fd 	mov	x29, sp
  400af0:	b9001fa0 	str	w0, [x29, #28]
  400af4:	b9001ba1 	str	w1, [x29, #24]
  400af8:	b90017a2 	str	w2, [x29, #20]
  400afc:	a9027fbf 	stp	xzr, xzr, [x29, #32]
  400b00:	a9037fbf 	stp	xzr, xzr, [x29, #48]
  400b04:	b9401fa0 	ldr	w0, [x29, #28]
  400b08:	7100041f 	cmp	w0, #0x1
  400b0c:	54000200 	b.eq	400b4c <xy_trigger_timer_delay+0x64>  // b.none
  400b10:	b9401fa0 	ldr	w0, [x29, #28]
  400b14:	7100081f 	cmp	w0, #0x2
  400b18:	540001a0 	b.eq	400b4c <xy_trigger_timer_delay+0x64>  // b.none
  400b1c:	b9401fa0 	ldr	w0, [x29, #28]
  400b20:	71000c1f 	cmp	w0, #0x3
  400b24:	54000140 	b.eq	400b4c <xy_trigger_timer_delay+0x64>  // b.none
  400b28:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400b2c:	910fe002 	add	x2, x0, #0x3f8
  400b30:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400b34:	91020001 	add	x1, x0, #0x80
  400b38:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400b3c:	9103c000 	add	x0, x0, #0xf0
  400b40:	aa0203e3 	mov	x3, x2
  400b44:	52800c42 	mov	w2, #0x62                  	// #98
  400b48:	97ffff16 	bl	4007a0 <__assert_fail@plt>
  400b4c:	b9401fa0 	ldr	w0, [x29, #28]
  400b50:	7100081f 	cmp	w0, #0x2
  400b54:	54000240 	b.eq	400b9c <xy_trigger_timer_delay+0xb4>  // b.none
  400b58:	71000c1f 	cmp	w0, #0x3
  400b5c:	540003a0 	b.eq	400bd0 <xy_trigger_timer_delay+0xe8>  // b.none
  400b60:	7100041f 	cmp	w0, #0x1
  400b64:	54000501 	b.ne	400c04 <xy_trigger_timer_delay+0x11c>  // b.any
  400b68:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400b6c:	91048001 	add	x1, x0, #0x120
  400b70:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400b74:	91086000 	add	x0, x0, #0x218
  400b78:	97fffeee 	bl	400730 <fopen@plt>
  400b7c:	f90027a0 	str	x0, [x29, #72]
  400b80:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400b84:	91048001 	add	x1, x0, #0x120
  400b88:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400b8c:	9108e000 	add	x0, x0, #0x238
  400b90:	97fffee8 	bl	400730 <fopen@plt>
  400b94:	f90023a0 	str	x0, [x29, #64]
  400b98:	1400001f 	b	400c14 <xy_trigger_timer_delay+0x12c>
  400b9c:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400ba0:	91048001 	add	x1, x0, #0x120
  400ba4:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400ba8:	91096000 	add	x0, x0, #0x258
  400bac:	97fffee1 	bl	400730 <fopen@plt>
  400bb0:	f90027a0 	str	x0, [x29, #72]
  400bb4:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400bb8:	91048001 	add	x1, x0, #0x120
  400bbc:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400bc0:	9109e000 	add	x0, x0, #0x278
  400bc4:	97fffedb 	bl	400730 <fopen@plt>
  400bc8:	f90023a0 	str	x0, [x29, #64]
  400bcc:	14000012 	b	400c14 <xy_trigger_timer_delay+0x12c>
  400bd0:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400bd4:	91048001 	add	x1, x0, #0x120
  400bd8:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400bdc:	910a8000 	add	x0, x0, #0x2a0
  400be0:	97fffed4 	bl	400730 <fopen@plt>
  400be4:	f90027a0 	str	x0, [x29, #72]
  400be8:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400bec:	91048001 	add	x1, x0, #0x120
  400bf0:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400bf4:	910b0000 	add	x0, x0, #0x2c0
  400bf8:	97fffece 	bl	400730 <fopen@plt>
  400bfc:	f90023a0 	str	x0, [x29, #64]
  400c00:	14000005 	b	400c14 <xy_trigger_timer_delay+0x12c>
  400c04:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400c08:	910b8000 	add	x0, x0, #0x2e0
  400c0c:	97fffedd 	bl	400780 <puts@plt>
  400c10:	d503201f 	nop
  400c14:	f94027a0 	ldr	x0, [x29, #72]
  400c18:	f100001f 	cmp	x0, #0x0
  400c1c:	54000080 	b.eq	400c2c <xy_trigger_timer_delay+0x144>  // b.none
  400c20:	f94023a0 	ldr	x0, [x29, #64]
  400c24:	f100001f 	cmp	x0, #0x0
  400c28:	540000c1 	b.ne	400c40 <xy_trigger_timer_delay+0x158>  // b.any
  400c2c:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400c30:	910be000 	add	x0, x0, #0x2f8
  400c34:	97fffed3 	bl	400780 <puts@plt>
  400c38:	52800000 	mov	w0, #0x0                   	// #0
  400c3c:	97fffead 	bl	4006f0 <exit@plt>
  400c40:	910083a0 	add	x0, x29, #0x20
  400c44:	d2800402 	mov	x2, #0x20                  	// #32
  400c48:	52800001 	mov	w1, #0x0                   	// #0
  400c4c:	97fffec1 	bl	400750 <memset@plt>
  400c50:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400c54:	910c6001 	add	x1, x0, #0x318
  400c58:	910083a0 	add	x0, x29, #0x20
  400c5c:	b9401ba2 	ldr	w2, [x29, #24]
  400c60:	97fffea8 	bl	400700 <sprintf@plt>
  400c64:	910083a0 	add	x0, x29, #0x20
  400c68:	f94027a1 	ldr	x1, [x29, #72]
  400c6c:	97fffe9d 	bl	4006e0 <fputs@plt>
  400c70:	910083a0 	add	x0, x29, #0x20
  400c74:	d2800402 	mov	x2, #0x20                  	// #32
  400c78:	52800001 	mov	w1, #0x0                   	// #0
  400c7c:	97fffeb5 	bl	400750 <memset@plt>
  400c80:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400c84:	910c6001 	add	x1, x0, #0x318
  400c88:	910083a0 	add	x0, x29, #0x20
  400c8c:	b94017a2 	ldr	w2, [x29, #20]
  400c90:	97fffe9c 	bl	400700 <sprintf@plt>
  400c94:	910083a0 	add	x0, x29, #0x20
  400c98:	f94023a1 	ldr	x1, [x29, #64]
  400c9c:	97fffe91 	bl	4006e0 <fputs@plt>
  400ca0:	52800000 	mov	w0, #0x0                   	// #0
  400ca4:	a8c57bfd 	ldp	x29, x30, [sp], #80
  400ca8:	d65f03c0 	ret

0000000000400cac <xy_trigger_mode_none>:
  400cac:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400cb0:	910003fd 	mov	x29, sp
  400cb4:	b9001fa0 	str	w0, [x29, #28]
  400cb8:	52800081 	mov	w1, #0x4                   	// #4
  400cbc:	b9401fa0 	ldr	w0, [x29, #28]
  400cc0:	97fffefb 	bl	4008ac <xy_configure_trigger>
  400cc4:	52800000 	mov	w0, #0x0                   	// #0
  400cc8:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400ccc:	d65f03c0 	ret

0000000000400cd0 <xy_trigger_mode_heartbeat>:
  400cd0:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400cd4:	910003fd 	mov	x29, sp
  400cd8:	b9001fa0 	str	w0, [x29, #28]
  400cdc:	52800021 	mov	w1, #0x1                   	// #1
  400ce0:	b9401fa0 	ldr	w0, [x29, #28]
  400ce4:	97fffef2 	bl	4008ac <xy_configure_trigger>
  400ce8:	52800000 	mov	w0, #0x0                   	// #0
  400cec:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400cf0:	d65f03c0 	ret

0000000000400cf4 <xy_trigger_mode_cpu0>:
  400cf4:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400cf8:	910003fd 	mov	x29, sp
  400cfc:	b9001fa0 	str	w0, [x29, #28]
  400d00:	52800041 	mov	w1, #0x2                   	// #2
  400d04:	b9401fa0 	ldr	w0, [x29, #28]
  400d08:	97fffee9 	bl	4008ac <xy_configure_trigger>
  400d0c:	52800000 	mov	w0, #0x0                   	// #0
  400d10:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400d14:	d65f03c0 	ret

0000000000400d18 <xy_trigger_mode_cpu1>:
  400d18:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400d1c:	910003fd 	mov	x29, sp
  400d20:	b9001fa0 	str	w0, [x29, #28]
  400d24:	52800061 	mov	w1, #0x3                   	// #3
  400d28:	b9401fa0 	ldr	w0, [x29, #28]
  400d2c:	97fffee0 	bl	4008ac <xy_configure_trigger>
  400d30:	52800000 	mov	w0, #0x0                   	// #0
  400d34:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400d38:	d65f03c0 	ret

0000000000400d3c <xy_trigger_mode_timer>:
  400d3c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400d40:	910003fd 	mov	x29, sp
  400d44:	b9001fa0 	str	w0, [x29, #28]
  400d48:	b9001ba1 	str	w1, [x29, #24]
  400d4c:	b90017a2 	str	w2, [x29, #20]
  400d50:	52800001 	mov	w1, #0x0                   	// #0
  400d54:	b9401fa0 	ldr	w0, [x29, #28]
  400d58:	97fffed5 	bl	4008ac <xy_configure_trigger>
  400d5c:	b94017a2 	ldr	w2, [x29, #20]
  400d60:	b9401ba1 	ldr	w1, [x29, #24]
  400d64:	b9401fa0 	ldr	w0, [x29, #28]
  400d68:	97ffff60 	bl	400ae8 <xy_trigger_timer_delay>
  400d6c:	52800000 	mov	w0, #0x0                   	// #0
  400d70:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400d74:	d65f03c0 	ret

0000000000400d78 <xy_led_fast_flash>:
  400d78:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400d7c:	910003fd 	mov	x29, sp
  400d80:	b9001fa0 	str	w0, [x29, #28]
  400d84:	52800642 	mov	w2, #0x32                  	// #50
  400d88:	52800641 	mov	w1, #0x32                  	// #50
  400d8c:	b9401fa0 	ldr	w0, [x29, #28]
  400d90:	97ffffeb 	bl	400d3c <xy_trigger_mode_timer>
  400d94:	52800000 	mov	w0, #0x0                   	// #0
  400d98:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400d9c:	d65f03c0 	ret

0000000000400da0 <xy_led_slow_flash>:
  400da0:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400da4:	910003fd 	mov	x29, sp
  400da8:	b9001fa0 	str	w0, [x29, #28]
  400dac:	52807d02 	mov	w2, #0x3e8                 	// #1000
  400db0:	52807d01 	mov	w1, #0x3e8                 	// #1000
  400db4:	b9401fa0 	ldr	w0, [x29, #28]
  400db8:	97ffffe1 	bl	400d3c <xy_trigger_mode_timer>
  400dbc:	52800000 	mov	w0, #0x0                   	// #0
  400dc0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400dc4:	d65f03c0 	ret

0000000000400dc8 <xy_led_brightness>:
  400dc8:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400dcc:	910003fd 	mov	x29, sp
  400dd0:	b9001fa0 	str	w0, [x29, #28]
  400dd4:	b9001ba1 	str	w1, [x29, #24]
  400dd8:	b9401fa0 	ldr	w0, [x29, #28]
  400ddc:	7100041f 	cmp	w0, #0x1
  400de0:	54000200 	b.eq	400e20 <xy_led_brightness+0x58>  // b.none
  400de4:	b9401fa0 	ldr	w0, [x29, #28]
  400de8:	7100081f 	cmp	w0, #0x2
  400dec:	540001a0 	b.eq	400e20 <xy_led_brightness+0x58>  // b.none
  400df0:	b9401fa0 	ldr	w0, [x29, #28]
  400df4:	71000c1f 	cmp	w0, #0x3
  400df8:	54000140 	b.eq	400e20 <xy_led_brightness+0x58>  // b.none
  400dfc:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400e00:	91104002 	add	x2, x0, #0x410
  400e04:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400e08:	91020001 	add	x1, x0, #0x80
  400e0c:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400e10:	9103c000 	add	x0, x0, #0xf0
  400e14:	aa0203e3 	mov	x3, x2
  400e18:	52801742 	mov	w2, #0xba                  	// #186
  400e1c:	97fffe61 	bl	4007a0 <__assert_fail@plt>
  400e20:	b9401ba0 	ldr	w0, [x29, #24]
  400e24:	7100001f 	cmp	w0, #0x0
  400e28:	540001a0 	b.eq	400e5c <xy_led_brightness+0x94>  // b.none
  400e2c:	b9401ba0 	ldr	w0, [x29, #24]
  400e30:	7100041f 	cmp	w0, #0x1
  400e34:	54000140 	b.eq	400e5c <xy_led_brightness+0x94>  // b.none
  400e38:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400e3c:	91104002 	add	x2, x0, #0x410
  400e40:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400e44:	91020001 	add	x1, x0, #0x80
  400e48:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400e4c:	910c8000 	add	x0, x0, #0x320
  400e50:	aa0203e3 	mov	x3, x2
  400e54:	52801782 	mov	w2, #0xbc                  	// #188
  400e58:	97fffe52 	bl	4007a0 <__assert_fail@plt>
  400e5c:	b9401fa0 	ldr	w0, [x29, #28]
  400e60:	7100081f 	cmp	w0, #0x2
  400e64:	54000180 	b.eq	400e94 <xy_led_brightness+0xcc>  // b.none
  400e68:	71000c1f 	cmp	w0, #0x3
  400e6c:	54000220 	b.eq	400eb0 <xy_led_brightness+0xe8>  // b.none
  400e70:	7100041f 	cmp	w0, #0x1
  400e74:	540002c1 	b.ne	400ecc <xy_led_brightness+0x104>  // b.any
  400e78:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400e7c:	91048001 	add	x1, x0, #0x120
  400e80:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400e84:	910d4000 	add	x0, x0, #0x350
  400e88:	97fffe2a 	bl	400730 <fopen@plt>
  400e8c:	f90017a0 	str	x0, [x29, #40]
  400e90:	14000013 	b	400edc <xy_led_brightness+0x114>
  400e94:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400e98:	91048001 	add	x1, x0, #0x120
  400e9c:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400ea0:	910de000 	add	x0, x0, #0x378
  400ea4:	97fffe23 	bl	400730 <fopen@plt>
  400ea8:	f90017a0 	str	x0, [x29, #40]
  400eac:	1400000c 	b	400edc <xy_led_brightness+0x114>
  400eb0:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400eb4:	91048001 	add	x1, x0, #0x120
  400eb8:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400ebc:	910e8000 	add	x0, x0, #0x3a0
  400ec0:	97fffe1c 	bl	400730 <fopen@plt>
  400ec4:	f90017a0 	str	x0, [x29, #40]
  400ec8:	14000005 	b	400edc <xy_led_brightness+0x114>
  400ecc:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400ed0:	910b8000 	add	x0, x0, #0x2e0
  400ed4:	97fffe2b 	bl	400780 <puts@plt>
  400ed8:	d503201f 	nop
  400edc:	f94017a0 	ldr	x0, [x29, #40]
  400ee0:	f100001f 	cmp	x0, #0x0
  400ee4:	540000c1 	b.ne	400efc <xy_led_brightness+0x134>  // b.any
  400ee8:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x30>
  400eec:	910f0000 	add	x0, x0, #0x3c0
  400ef0:	97fffe24 	bl	400780 <puts@plt>
  400ef4:	52800000 	mov	w0, #0x0                   	// #0
  400ef8:	97fffdfe 	bl	4006f0 <exit@plt>
  400efc:	b9401ba0 	ldr	w0, [x29, #24]
  400f00:	7100041f 	cmp	w0, #0x1
  400f04:	540000a1 	b.ne	400f18 <xy_led_brightness+0x150>  // b.any
  400f08:	f94017a1 	ldr	x1, [x29, #40]
  400f0c:	52800620 	mov	w0, #0x31                  	// #49
  400f10:	97fffe00 	bl	400710 <fputc@plt>
  400f14:	14000007 	b	400f30 <xy_led_brightness+0x168>
  400f18:	b9401ba0 	ldr	w0, [x29, #24]
  400f1c:	7100001f 	cmp	w0, #0x0
  400f20:	54000081 	b.ne	400f30 <xy_led_brightness+0x168>  // b.any
  400f24:	f94017a1 	ldr	x1, [x29, #40]
  400f28:	52800600 	mov	w0, #0x30                  	// #48
  400f2c:	97fffdf9 	bl	400710 <fputc@plt>
  400f30:	f94017a0 	ldr	x0, [x29, #40]
  400f34:	97fffdfb 	bl	400720 <fclose@plt>
  400f38:	52800000 	mov	w0, #0x0                   	// #0
  400f3c:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400f40:	d65f03c0 	ret

0000000000400f44 <xy_led_poweroff>:
  400f44:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400f48:	910003fd 	mov	x29, sp
  400f4c:	52800001 	mov	w1, #0x0                   	// #0
  400f50:	52800020 	mov	w0, #0x1                   	// #1
  400f54:	97ffff9d 	bl	400dc8 <xy_led_brightness>
  400f58:	52800001 	mov	w1, #0x0                   	// #0
  400f5c:	52800040 	mov	w0, #0x2                   	// #2
  400f60:	97ffff9a 	bl	400dc8 <xy_led_brightness>
  400f64:	52800001 	mov	w1, #0x0                   	// #0
  400f68:	52800060 	mov	w0, #0x3                   	// #3
  400f6c:	97ffff97 	bl	400dc8 <xy_led_brightness>
  400f70:	52800000 	mov	w0, #0x0                   	// #0
  400f74:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400f78:	d65f03c0 	ret

0000000000400f7c <main>:
  400f7c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400f80:	910003fd 	mov	x29, sp
  400f84:	52800021 	mov	w1, #0x1                   	// #1
  400f88:	52800020 	mov	w0, #0x1                   	// #1
  400f8c:	97ffff8f 	bl	400dc8 <xy_led_brightness>
  400f90:	52800021 	mov	w1, #0x1                   	// #1
  400f94:	52800040 	mov	w0, #0x2                   	// #2
  400f98:	97ffff8c 	bl	400dc8 <xy_led_brightness>
  400f9c:	52800021 	mov	w1, #0x1                   	// #1
  400fa0:	52800060 	mov	w0, #0x3                   	// #3
  400fa4:	97ffff89 	bl	400dc8 <xy_led_brightness>
  400fa8:	52800001 	mov	w1, #0x0                   	// #0
  400fac:	52800020 	mov	w0, #0x1                   	// #1
  400fb0:	97fffe3f 	bl	4008ac <xy_configure_trigger>
  400fb4:	52800c82 	mov	w2, #0x64                  	// #100
  400fb8:	52800c81 	mov	w1, #0x64                  	// #100
  400fbc:	52800020 	mov	w0, #0x1                   	// #1
  400fc0:	97fffeca 	bl	400ae8 <xy_trigger_timer_delay>
  400fc4:	d503201f 	nop
  400fc8:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400fcc:	d65f03c0 	ret

0000000000400fd0 <__libc_csu_init>:
  400fd0:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400fd4:	910003fd 	mov	x29, sp
  400fd8:	a901d7f4 	stp	x20, x21, [sp, #24]
  400fdc:	b0000094 	adrp	x20, 411000 <__FRAME_END__+0xfbdc>
  400fe0:	b0000095 	adrp	x21, 411000 <__FRAME_END__+0xfbdc>
  400fe4:	91374294 	add	x20, x20, #0xdd0
  400fe8:	913722b5 	add	x21, x21, #0xdc8
  400fec:	a902dff6 	stp	x22, x23, [sp, #40]
  400ff0:	cb150294 	sub	x20, x20, x21
  400ff4:	f9001ff8 	str	x24, [sp, #56]
  400ff8:	2a0003f6 	mov	w22, w0
  400ffc:	aa0103f7 	mov	x23, x1
  401000:	9343fe94 	asr	x20, x20, #3
  401004:	aa0203f8 	mov	x24, x2
  401008:	97fffda8 	bl	4006a8 <_init>
  40100c:	b4000194 	cbz	x20, 40103c <__libc_csu_init+0x6c>
  401010:	f9000bb3 	str	x19, [x29, #16]
  401014:	d2800013 	mov	x19, #0x0                   	// #0
  401018:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  40101c:	aa1803e2 	mov	x2, x24
  401020:	aa1703e1 	mov	x1, x23
  401024:	2a1603e0 	mov	w0, w22
  401028:	91000673 	add	x19, x19, #0x1
  40102c:	d63f0060 	blr	x3
  401030:	eb13029f 	cmp	x20, x19
  401034:	54ffff21 	b.ne	401018 <__libc_csu_init+0x48>  // b.any
  401038:	f9400bb3 	ldr	x19, [x29, #16]
  40103c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  401040:	a942dff6 	ldp	x22, x23, [sp, #40]
  401044:	f9401ff8 	ldr	x24, [sp, #56]
  401048:	a8c47bfd 	ldp	x29, x30, [sp], #64
  40104c:	d65f03c0 	ret

0000000000401050 <__libc_csu_fini>:
  401050:	d65f03c0 	ret

Disassembly of section .fini:

0000000000401054 <_fini>:
  401054:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  401058:	910003fd 	mov	x29, sp
  40105c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  401060:	d65f03c0 	ret
